Formal Verification Engineer ASIC

Publiceringsdatum: 2025-03-13

Är du intresserad av att jobba inom yrken med teknisk inriktning? En möjlighet har öppnat upp för dig att börja arbeta som kvalitetsingenjör, el-tele hos Norla AB. Om du vill arbeta heltid hos Norla AB, har de just nu en tjänst 6 månader eller längre som kan passa dig.

Denna position är tillgänglig i ospecificerad arbetsort. Om du tycker att det låter intressant att börja jobba hos Norla AB i rollen som kvalitetsingenjör, el-tele så har de just nu en ledig tjänst som skulle kunna vara en perfekt match för dig! Har du vad som krävs för att arbeta som kvalitetsingenjör, el-tele hos Norla AB? Ansök innan lördag den tolfte april 2025 och ta reda på det!

Jobbannons

About Norla

Norla is an IT and management consulting company driven by customer satisfaction. We work in a multicultural environment and are guided by our principle of "Mind and Heart." We prioritize that our relationships with our employees ensure their professional growth and success. Together, we collaborate with a network of major actors to discover the best talents to support our clients.

The preferred location for this role is Sweden, but remote work within Europe may be considered for the right candidate. This is an exciting opportunity to work on cutting-edge telecom ASIC designs, collaborating with a skilled and innovative team.

Key Responsibilities

• Develop and implement formal verification strategies for ASIC designs.
• Define formal verification plans, ensuring coverage and completeness.
• Work closely with design and verification teams to integrate formal verification into the overall verification flow.
• Apply model checking, property checking, and assertion-based verification to validate designs.
• Identify and debug design issues early in the development cycle.
• Contribute to methodology improvements and best practices for formal verification.

Requirements

• 3+ years of experience in ASIC formal verification.
• Strong expertise in formal verification tools (such as JasperGold, VC Formal, Questa Formal, or similar).
• Experience with SystemVerilog Assertions (SVA) and Property Specification Language (PSL).
• Solid understanding of digital design, RTL, and verification concepts.
• Experience in telecom ASICs or networking-related semiconductor designs.
• Knowledge of UVM (Universal Verification Methodology) is a plus.
• Strong problem-solving and debugging skills.
• Fluent in English.
• Must be eligible to work in Sweden or remotely within Europe.